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  general description the max6746?ax6753 low-power microprocessor (?) supervisory circuits monitor single/dual system supply voltages from 1.575v to 5v and provide maxi- mum adjustability for reset and watchdog functions. these devices assert a reset signal whenever the v cc supply voltage or reset in falls below its reset thresh- old or when manual reset is pulled low. the reset output remains asserted for the reset timeout period after v cc and reset in rise above the reset threshold. the reset function features immunity to power-supply transients. the max6746?ax6753 have ?% factory-trimmed reset threshold voltages in approximately 100mv incre- ments from 1.575v to 5.0v and/or adjustable reset threshold voltages using external resistors. the reset and watchdog delays are adjustable with external capacitors. the max6746?ax6751 contain a watchdog select input that extends the watchdog time- out period by 128x. the max6752/max6753 contain a window watchdog timer that looks for activity outside an expected window of operation. the max6746?ax6753 are available with a push-pull or open-drain active-low reset output. the max6746 max6753 are available in an 8-pin sot23 package and are fully specified over the automotive temperature range (-40? to +125?). applications features  factory-set reset threshold options from 1.575v to 5v in ~100mv increments  adjustable reset threshold options  single/dual voltage monitoring  capacitor-adjustable reset timeout  capacitor-adjustable watchdog timeout  min/max (windowed) watchdog option  manual reset input option  guaranteed reset valid for v cc 1v  3.7 a supply current  push-pull or open-drain reset output options  power-supply transient immunity  small 8-pin sot23 packages max6746?ax6753 ? reset circuits with capacitor-adjustable reset/watchdog timeout delay ________________________________________________________________ maxim integrated products 1 wdi wds gnd 1 2 8 7 v cc reset swt srt reset in (mr) ( ) are for max6746 and max6747 only. top view 3 4 6 5 max6746 max6751 sot23-8 pin configurations 19-2530; rev 6; 4/11 for pricing, delivery, and ordering information, please contact maxim direct at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com. note: _ _ represents the two number suffix needed when ordering the reset threshold voltage value for the max6746/max6747 and max6750?ax6753. the reset threshold voltages are available in approximately 100mv incre- ments. table 2 contains the suffix and reset factory-trimmed voltages. all devices are available in tape-and-reel only. there is a 2500-piece minimum order increment for standard ver- sions (see table 3). sample stock is typically held on standard versions only. nonstandard versions require a minimum order increment of 10,000 pieces. contact factory for availability. devices are available in both leaded and lead-free packaging. specify lead-free by replacing ?t?with ?t?when ordering. /v denotes an automotive qualified part. medical equipment automotive intelligent instruments portable equipment battery-powered computers/controllers embedded controllers critical ? monitoring set-top boxes computers ordering information part temp range pin-package max6746 ka_ _-t -40? to +125? 8 sot23 max6746ka_ _/v+t -40? to +125? 8 sot23 max6747 ka_ _-t -40? to +125? 8 sot23 max6747 ka_ _/v+t -40? to +125? 8 sot23 max6748 ka-t -40? to +125? 8 sot23 max6749 ka-t -40? to +125? 8 sot23 max6750 ka_ _-t -40? to +125? 8 sot23 max6750ka_ _/v+t -40? to +125? 8 sot23 max6751 ka_ _-t -40? to +125? 8 sot23 max6752 ka_ _-t -40? to +125? 8 sot23 max6753 ka_ _-t -40? to +125? 8 sot23 max6753ka_ _/v+t -40? to +125? 8 sot23 selector guide appears at end of data sheet. typical operating circuit appears at end of data sheet. pin configurations continued at end of data sheet.
max6746?ax6753 ? reset circuits with capacitor-adjustable reset/watchdog timeout delay 2 _______________________________________________________________________________________ absolute maximum ratings electrical characteristics (v cc = +1.2v to +5.5v, t a = t min to t max , unless otherwise specified. typical values are at v cc = +5v and t a = +25?.) (note 1) stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. v cc to gnd ...........................................................-0.3v to +6.0v srt, swt, set0, set1, reset in, wds, mr , wdi, to gnd .......................................?0.3v to (v cc + 0.3v) reset (push-pull) to gnd......................?0.3v to (v cc + 0.3v) reset (open drain) to gnd .............................?0.3v to +6.0v input current (all pins) .....................................................?0ma output current ( reset ) ...................................................?0ma continuous power dissipation (t a = +70?) 8-pin sot23 (derate 8.9mw/? above +70?)............714mw operating temperature range .........................-40? to +125? storage temperature range ............................-65? to +150? junction temperature ......................................................+150? lead temperature (soldering, 10s) .................................+300? soldering temperature (reflow) .......................................+260? parameter symbol conditions min typ max units t a = 0? to +125? 1.0 5.5 supply voltage v cc t a = -40? to 0? 1.2 5.5 v v cc 5.5v 5 10 v cc 3.3v 4.2 9 supply current i cc v cc 2.0v 3.7 8 ? v cc reset threshold v th see v th selection table t a = -40? to+125? v th - 2% v th + 2% v hysteresis v hyst 0.8 % v cc to reset delay v cc falling from v th + 100mv to v th - 100mv at 1mv/? 20 ? c srt = 1500pf 5.692 7.590 9.487 reset timeout period t rp c srt = 100pf 0.506 ms srt ramp current i ramp v srt = 0 to 1.23v; v cc = 1.6v to 5v 200 250 300 na srt ramp threshold v ramp v cc = 1.6v to 5v (v ramp rising) 1.173 1.235 1.297 v c swt = 1500pf 5.692 7.590 9.487 normal watchdog timeout period (max6746?ax6751) t wd c swt = 100pf 0.506 ms c swt = 1500pf 728.6 971.5 1214.4 extended watchdog timeout (max6746?ax6751) t wd c swt = 100pf 64.77 ms c swt = 1500pf 728.6 971.5 1214.4 slow watchdog period (max6752/max6753) t wd2 c swt = 100pf 64.77 ms c swt = 1500pf 91.08 121.43 151.80 fast watchdog timeout period, set ratio = 8, (max6752/max6753) t wd1 c swt = 100pf 8.09 ms c swt = 1500pf 45.53 60.71 75.89 fast watchdog timeout period, set ratio = 16, (max6752/max6753) t wd1 c swt = 100pf 4.05 ms
max6746?ax6753 ? reset circuits with capacitor-adjustable reset/watchdog timeout delay _______________________________________________________________________________________ 3 electrical characteristics (continued) (v cc = +1.2v to +5.5v, t a = t min to t max , unless otherwise specified. typical values are at v cc = +5v and t a = +25?.) (note 1) parameter symbol conditions min typ max units c swt = 1500pf 11.38 15.18 18.98 fast watchdog timeout period, set ratio = 64, (max6752/max6753) t wd1 c swt = 100pf 1.01 ms fast watchdog minimum period (max6752/max6753) 2000 ns swt ramp current i ramp v swt = 0 to 1.23v, v cc = 1.6v to 5v 200 250 300 na swt ramp threshold v ramp v cc = 1.6v to 5v (v ramp rising) 1.173 1.235 1.297 v v cc 1.0v, i sink = 50? 0.3 v cc 2.7v, i sink = 1.2ma 0.3 reset output-voltage low open-drain, push-pull (asserted) v ol v cc 4.5v, i sink = 3.2ma 0.4 v v cc 1.8v, i source = 200? 0.8 x v cc v cc 2.25v, i source = 500? 0.8 x v cc reset output-voltage high, push-pull (not asserted) v oh v cc 4.5v, i source = 800? 0.8 x v cc v reset output leakage current, open drain i lkg v cc > v th , reset not asserted, v reset = 5.5v 1.0 ? digital inputs ( mr , set0, set1, wdi, wds) v il 0.8 v ih v cc 4.0v 2.4 v il v cc < 4.0v 0.3 x v cc input logic levels v ih 0.7 x v cc v mr minimum pulse width 1s mr glitch rejection 100 ns mr to reset delay 200 ns mr pullup resistance pullup to v cc 12 20 28 k wdi minimum pulse width 300 ns reset in reset in threshold v reset in t a = -40? to +125? 1.216 1.235 1.254 v reset in leakage current i reset in -50 1 +50 na reset in to reset delay reset in falling at 1mv/? 20 ? note 1: production testing done at t a = +25?. over temperature limits are guaranteed by design.
max6746?ax6753 ? reset circuits with capacitor-adjustable reset/watchdog timeout delay 4 _______________________________________________________________________________________ typical operating characteristics (v cc = +5v, t a = +25?, unless otherwise noted.) reset timeout period vs. c srt max6746 toc01 c srt (pf) reset timeout period (ms) 10,000 1000 1 10 100 1000 0.1 100 100,000 watchdog timeout period vs. c swt max6746 toc02 c swt (pf) watchdog timeout period (ms) 10,000 1000 1 10 100 1000 10,000 100,000 0.1 100 100,000 max6746?ax6751 extended mode normal mode supply current vs. supply voltage max6746 toc03 supply voltage (v) supply current ( a) 5 4 3 2 2 1 3 4 5 6 0 16 normalized reset timeout period vs. temperature max6746 toc04 temperature ( c) normalized timeout period 100 75 50 25 0 -25 0.95 1.00 1.05 1.10 1.15 1.20 0.90 -50 125 c srt = 100pf c srt = 1500pf normalized watchdog timeout period vs. temperature max6746 toc05 temperature ( c) normalized timeout period 100 75 50 25 0 -25 0.95 0.90 0.85 1.00 1.05 1.10 1.15 1.20 0.80 -50 125 c swt = 100pf c swt = 1500pf maximum transient duration vs. reset threshold overdrive max6746 toc06 reset threshold overdrive (mv) transient duration ( s) 800 600 400 200 25 50 75 100 125 150 175 0 0 1000 reset occurs above the curve v th = 2.92v supply current vs. temperature max6746 toc07 temperature ( c) supply current ( a) 100 75 25 50 0 -25 1 2 3 4 5 6 0 -50 125 v cc = 3.3v v cc = 1.8v v cc = 5v normalized reset in threshold voltage vs. temperature max6746 toc08 temperature ( c) normalized reset threshold voltage 100 75 50 25 0 -25 0.994 0.992 0.996 1.000 0.998 1.004 1.002 1.008 1.006 1.010 0.990 -50 125 v cc = 5v reset in threshold vs. supply voltage max6746 toc08b supply voltage (v) reset in threshold (v) 5 4 3 2 1.236 1.237 1.238 1.239 1.240 1.235 16
max6746?ax6753 ? reset circuits with capacitor-adjustable reset/watchdog timeout delay _______________________________________________________________________________________ 5 v cc to reset delay vs. temperature (v cc falling) max6746 toc09 temperature ( c) v cc to reset delay ( s) 100 75 50 25 0 -25 25.4 25.8 26.2 26.6 27.0 25.0 -50 125 v cc falling at 1mv/ s reset and watchdog timeout period vs. supply voltage max6746 toc10 v cc (v) timeout period (ms) 5.5 5.0 4.0 4.5 2.5 3.0 3.5 2.0 0.44 0.48 0.52 0.56 0.60 0.40 1.5 6.0 c swt = c srt = 100pf typical operating characteristics (continued) (v cc = +5v, t a = +25?, unless otherwise noted.) reset and watching timeout period vs. supply voltage max6746 toc11 v cc (v) timeout period (ms) 5.5 5.0 4.5 4.0 3.5 3.0 2.5 2.0 6.5 7.0 7.5 8.0 8.5 9.0 6.0 1.5 6.0 c swt = c srt = 1500pf reset watchdog pin description pin max6746 max6747 max6748 max6751 max6752 max6753 name function 1 mr manual reset input. pull mr low to manually reset the device. reset remains asserted for the reset timeout period after mr is released. 1 reset in reset input. high-impedance input to the adjustable reset comparator. connect reset in to the center point of an external resistor-divider to set the threshold of the externally monitored voltage. 1 set0 logic input. set0 selects watchdog window ratio or disables the watchdog timer. see table 1. 2 2 2 swt watchdog timeout input. max6746?ax6751: connect a capacitor between swt and ground to set the basic watchdog timeout period (t wd ). determine the period by the formula t wd = 5.06 x 10 6 x c swt with t wd in seconds and c swt in farads. extend the basic watchdog timeout period by using the wds input. connect swt to ground to disable the watchdog timer function. max6752/max6753: connect a capacitor between swt and ground to set the slow watchdog timeout period (t wd2 ). determine the slow watchdog period by the formula: t wd2 = 0.65 x 10 9 x c swt with t wd2 in seconds and c swt in farads. the fast watchdog timeout period is set by pinstrapping set0 and set1 (connect set0 high and set1 low to disable the watchdog timer function.) see table 1. 3 3 3 srt reset timeout input. connect a capacitor from srt to gnd to select the reset timeout period. determine the period as follows: t rp = 5.06 x 10 6 x c srt with t rp in seconds and c srt in farads. 4 4 4 gnd ground
max6746?ax6753 ? reset circuits with capacitor-adjustable reset/watchdog timeout delay 6 _______________________________________________________________________________________ pin description (continued) pin max6746 max6747 max6748 max6751 max6752 max6753 name function 5 5 wds watchdog select input. wds selects the watchdog mode. connect wds to ground to select normal mode and the watchdog timeout period. connect wds to v cc to select extended mode, multiplying the basic timeout period by a factor of 128. a change in the state of wds clears the watchdog timer. 5 set1 logic input. set1 selects the watchdog window ratio or disables the watchdog timer. see table 1. 6 6 6 wdi watchdog input. max6746?ax6751: a falling transition must occur on wdi within the selected watchdog timeout period or a reset pulse occurs. the watchdog timer clears when a transition occurs on wdi or whenever reset is asserted. connect swt to ground to disable the watchdog timer function. max6752/max6753: wdi falling transitions within periods shorter than t wd1 or longer than t wd2 force reset to assert low for the reset timeout period. the watchdog timer begins to count after reset is deasserted. the watchdog timer clears when a valid transition occurs on wdi or whenever reset is asserted. connect set0 high and set1 low to disable the watchdog timer function. see the watchdog timer section. 777 reset push/pull or open-drain reset output. reset asserts whenever v cc or reset in drops below the selected reset threshold voltage (v th or v reset in , respectively) or manual reset is pulled low. reset remains low for the reset timeout period after all reset conditions are deasserted, and then goes high. the watchdog timer triggers a reset pulse (t rp ) whenever a watchdog fault occurs. 888v cc supply voltage. v cc is the power-supply input and the input for fixed threshold v cc monitor.
detailed description the max6746?ax6753 assert a reset signal whenever the v cc supply voltage or reset in falls below its reset threshold. the reset output remains asserted for the reset timeout period after v cc and reset in rise above its respective reset threshold. a watchdog timer triggers a reset pulse whenever a watchdog fault occurs. the reset and watchdog delays are adjustable with external capacitors. the max6746?ax6751 contain a watchdog select input that extends the watchdog time- out period to 128x. the max6752 and max6753 have a sophisticated watchdog timer that detects when the processor is run- ning outside an expected window of operation. the watchdog signals a fault when the input pulses arrive too early (faster that the selected t wd1 timeout period) or too late (slower than the selected t wd2 timeout period) (see figure 1). reset output the reset output is typically connected to the reset input of a ?. a ?? reset input starts or restarts the ? in a known state. the max6746?ax6753 ? supervisory circuits provide the reset logic to prevent code-execu- tion errors during power-up, power-down, and brownout conditions (see the typical operating circuit ). reset changes from high to low whenever the moni- tored voltage, reset in and/or v cc drop below the reset threshold voltages. once v reset in and/or v cc exceeds its respective reset threshold voltage(s), reset remains low for the reset timeout period, then goes high. reset is guaranteed to be in the correct logic state for v cc greater than 1v. for applications requiring valid reset logic when v cc is less than 1v, see the section ensuring a valid reset output down to v cc = 0v. reset in threshold the max6748?ax6751 monitor the voltage on reset in using an adjustable reset threshold (v reset in ) set with an external resistor voltage-divider (figure 2). use the following formula to calculate the externally monitored voltage (v mon_th ): v mon_th = v reset in x (r1 + r2) / r2 max6746?ax6753 ? reset circuits with capacitor-adjustable reset/watchdog timeout delay _______________________________________________________________________________________ 7 figure 1. max6752/max6753 detailed watchdog input timing relationship max6748 max6749 max6750 max6751 reset in gnd v cc v cc v mon_th v mon_th = 1.235 x (r1 + r2) / r2 r1 r2 figure 2. calculating the monitored threshold voltage (v mon_th ) wdi condition 1 wdi condition 2 wdi condition 3 guaranteed to not assert reset guaranteed to assert reset t wd1 (min) t wd1 (max) *undetermined *undetermined fast fault normal operation slow fault *undetermined states may or may not generate a fault condition guaranteed to assert reset t wd2 (min) t wd2 (max)
max6746?ax6753 where v mon_th is the desired reset threshold voltage and v th is the reset input threshold (1.235v). resistors r1 and r2 can have very high values to minimize cur- rent consumption due to low leakage currents. set r2 to some conveniently high value (500k , for example) and calculate r1 based on the desired reset threshold voltage, using the following formula: r1 = r2 x (v mon_th /v reset in - 1) ( ) the max6748 and max6749 do not monitor v cc sup- ply voltage, therefore, v cc must be greater than 1.5v to guarantee reset in threshold accuracy and timing performance. the max6748 and max6749 can be con- figured to monitor v cc voltage by connecting v cc to v mon_th. dual-voltage monitoring (max6750/max6751) the max6750 and max6751 contain both factory- trimmed threshold voltages and an adjustable reset threshold input, allowing the monitoring of two voltages, v cc and v mon_th (see figure 2). reset is asserted when either of the voltages falls below it respective threshold voltages. manual reset (max6746/max6747) many ?-based products require manual reset capabil- ity, to allow an operator or external logic circuitry to initi- ate a reset. the manual reset input ( mr ) can connect directly to a switch without an external pullup resistor or debouncing network. mr is internally pulled up to v cc and, therefore, can be left unconnected if unused. mr is designed to reject fast, falling transients (typically 100ns pulses) and it must be held low for a minimum of 1? to assert the reset output. a 0.1? capacitor from mr to ground provides additional noise immunity. after mr transitions from low to high, reset remains asserted for the duration of the reset timeout period. a manual reset option can easily be implemented with the max6748?ax6751 by connecting a normally open momentary switch in parallel with r2 (figure 3). when the switch is closed, the voltage on reset in goes to zero, initiating a reset. similar to the max6746/ max6747 manual reset, reset remains asserted while the voltage at reset in is zero and for the reset time- out period after the switch is opened. ? reset circuits with capacitor-adjustable reset/watchdog timeout delay 8 _______________________________________________________________________________________ v cc wdi t wd t rp reset normal mode (wds = gnd) v cc ov ov figure 4a. watchdog timing diagram, wds = gnd max6748 max6749 max6750 max6751 reset in gnd v cc v cc v mon_th r1 r2 figure 3. adding an external manual reset function to the max6748?ax6751
watchdog timer max6746?ax6751 the watchdog? circuit monitors the ?? activity. it the ? does not toggle the watchdog input (wdi) within t wd (user-selected), reset asserts for the reset time- out period. the internal watchdog timer is cleared by any event that asserts reset , by a falling transition at wdi (which can detect pulses as short as 300ns) or by a transition at wds. the watchdog timer remains cleared while reset is asserted; as soon as reset is released, the timer starts counting. the max6746?ax6751 feature two modes of watch- dog operation: normal mode and extended mode. in nor- mal mode (figure 4a), the watchdog timeout period is determined by the value of the capacitor connected between swt and ground. in extended mode (figure 4b), the watchdog timeout period is multiplied by 128. for example, in extended mode, a 0.1? capacitor gives a watchdog timeout period of 65s (see the extended- mode watchdog timeout period vs. c swt graph in the typical operating characteristics ). to disable the watch- dog timer function, connect swt to ground. max6752/max6753 the max6752 and max6753 have a windowed watch- dog timer that asserts reset for the adjusted reset timeout period when the watchdog recognizes a fast watchdog fault (t wdi < t wd1 ), or a slow watchdog fault (period > t wd2 ). the reset timeout period is adjusted independently of the watchdog timeout period. the slow watchdog period, t wd2 is calculated as follows: t wd2 = 0.65 x 10 9 x c swt with t wd2 in seconds and c swt in farads. the fast watchdog period, t wd1 , is selectable as a ratio from the slow watchdog fault period (t wd2 ). select the fast watchdog period by pinstrapping set0 and set1, where high is v cc and low is gnd. table 1 illus- trates the set0 and set1 configuration for the 8, 16, and 64 window ratio ( t wd2 /t wd1 ). for example, if c swt is 1500pf, and set0 and set1 are low, then t wd2 is 975ms (typ) and t wd1 is 122ms (typ). reset asserts if the watchdog input has two falling edges too close to each other (faster than t wd1 ) (figure 5a) or falling edges that are too far apart (slower than t wd2 ) (figure 5b). normal watchdog operation is dis- played in (figure 5c). the internal watchdog timer is cleared when a wdi falling edge is detected within the valid watchdog window or when reset is deasserted. all wdi inputs are ignored while reset is asserted. the watchdog timer begins to count after reset is deasserted. the watchdog timer clears and begins to count after a valid wdi falling logic input. wdi falling transitions within periods shorter than t wd1 or longer than t wd2 force reset to assert low for the reset time- out period. wdi falling transitions within the t wd1 and t wd2 window do not assert reset . wdi transitions between t wd1(min) and t wd1(max) or t wd2(min) and t wd2(max) are not guaranteed to assert or deassert the reset . to guarantee that the window watchdog does not assert the reset , strobe wdi between t wd1(max) and t wd2(min) . the watchdog timer is cleared when reset is asserted or after a falling transition on wdi or after a state change on set0 or set1. disable the watchdog timer by connecting set0 high and set1 low. max6746?ax6753 ? reset circuits with capacitor-adjustable reset/watchdog timeout delay _______________________________________________________________________________________ 9 t wd x 128 t rp v cc wdi reset extended mode (wds = v cc ) v cc ov ov figure 4b. watchdog timing diagram, wds = v cc set0 set1 ratio low low 8 low high 16 high low watchdog disabled high high 64 table 1. min/max watchdog setting
max6746?ax6753 applications information selecting reset/watchdog timeout capacitor the reset timeout period is adjustable to accommodate a variety of ? applications. adjust the reset timeout period (t rp ) by connecting a capacitor (c srt ) between srt and ground. calculate the reset timeout capacitor as folllows: c srt = t rp / (5.06 x 10 6 ) with t rp in seconds and c srt in farads. the watchdog timeout period is adjustable to accom- modate a variety of ? applications. with this feature, the watchdog timeout can be optimized for software execution. the programmer can determine how often the watchdog timer should be serviced. adjust the watchdog timeout period (t wd ) by connecting a specif- ic value capacitor (c swt ) between swt and gnd. for normal mode operation, calculate the watchdog time- out capacitor as follows: c swt = t wd /(5.06 x 10 6 ) with t rp in seconds and c srt in farads. for the max6752 and max6753 windowed watchdog function, calculate the slow watchdog period, t wd2 as follows: t wd2 = 0.65 x 10 9 x c swt c srt and c swt must be a low-leakage (< 10na) type capacitor. ceramic capacitors are recommended. transient immunity in addition to issuing a reset to the ? during power-up, power-down, and brownout conditions, these supervi- sors are relatively immune to short-duration supply tran- sients (glitches). the maximum transient duration vs. reset threshold overdrive graph in the typical operating characteristics shows this relationship. the area below the curves of the graph is the region in which these devices typically do not generate a reset pulse. this graph was generated using a falling pulse applied to v cc , starting above the actual reset threshold (v th ) and ending below it by the magnitude indicated (reset-threshold overdrive). as the magnitude of the tran- sient increases (farther below the reset threshold), the maximum allowable pulse width decreases. typically, a v cc transient that goes 100mv below the reset threshold and lasts 50? or less does not cause a reset pulse to be issued. ? reset circuits with capacitor-adjustable reset/watchdog timeout delay 10 ______________________________________________________________________________________ max6747 max6749 max6451 max6753 gnd n reset reset 5v v cc v cc gnd 3.3v p 100k figure 6. interfacing to other voltage levels wdi (a) fast fault (b) slow fault wdi reset (c) normal operation (no pulsing, output stays high) reset wdi reset t wdi < t wd1 (min) t wdi > t wd2 (max) t wd1 (max) < t wdi < t wd2 (min) figure 5. max6752/max6753 window watchdog diagram
interfacing to other voltages for logic compatibility the open-drain reset output can be used to interface to a ? with other logic levels. as shown in figure 6, the open-drain output can be connected to voltages from 0 to 6v. generally, the pullup resistor connected to the reset connects to the supply voltage that is being monitored at the ic? v cc pin. however, some systems can use the open-drain output to level-shift from the monitored supply to reset circuitry powered by some other supply. keep in mind that as the supervisor? v cc decreases towards 1v, so does the ic? ability to sink current at reset . also, with any pullup resistor, reset is pulled high as v cc decays toward zero. the voltage where this occurs depends on the pullup resistor value and the voltage to which it is connected. ensuring a valid reset down to v cc = 0v (push-pull reset ) when v cc falls below 1v, reset current sinking capabil- ities decline drastically. the high-impedance cmos- logic inputs connected to reset can drift to undeter- mined voltages. this presents no problems in most applications, since most ?s and other circuitry do not operate with v cc below 1v. in those applications where reset must be valid down to 0v, add a pulldown resistor between reset and gnd for the max6746/max6748/max6750/max6752 push/pull outputs. the resistor sinks any stray leakage currents, holding reset low (figure 7). the value of the pulldown resistor is not critical; 100k is large enough not to load reset and small enough to pull reset to ground. the external pulldown can not be used with the open-drain reset outputs. max6746?ax6753 ? reset circuits with capacitor-adjustable reset/watchdog timeout delay ______________________________________________________________________________________ 11 max6746 max6748 max6450 max6752 gnd reset v cc v cc 100k figure 7. ensuring reset valid to v cc = 0v
max6746?ax6753 ? reset circuits with capacitor-adjustable reset/watchdog timeout delay 12 ______________________________________________________________________________________ part top mark max6746ka16 aedi max6746ka23 aedj max6746ka26 aedk max6746ka29 aaln max6746ka46 aedl max6747ka16 aalo max6747ka23 aedm max6747ka26 aedn max6747ka29 aedo max6747ka46 aedp max6748ka aalp max6749ka aalq max6750ka16 aedq max6750ka23 aalr max6750ka26 aedr max6750ka29 aeds max6750ka46 aedt max6751ka16 aedu max6751ka23 aedv max6751ka26 aedw max6751ka29 aedx max6751ka46 aedy max6752ka16 aedz max6752ka23 aeea max6752ka26 aalt max6752ka29 aeeb max6752ka46 aeec max6753ka16 aeed max6753ka23 aeee max6753ka26 aeef max6753ka29 aeeg max6753ka46 aeeh suffix min typ max 50 4.900 5.000 5.100 49 4.802 4.900 4.998 48 4.704 4.800 4.896 47 4.606 4.700 4.794 46 4.533 4.625 4.718 45 4.410 4.500 4.590 44 4.288 4.375 4.463 43 4.214 4.300 4.386 42 4.116 4.200 4.284 41 4.018 4.100 4.182 40 3.920 4.000 4.080 39 3.822 3.900 3.978 38 3.724 3.800 3.876 37 3.626 3.700 3.774 36 3.528 3.600 3.672 35 3.430 3.500 3.570 34 3.332 3.400 3.468 33 3.234 3.300 3.366 32 3.136 3.200 3.264 31 3.014 3.075 3.137 30 2.940 3.000 3.060 29 2.867 2.925 2.984 28 2.744 2.800 2.856 27 2.646 2.700 2.754 26 2.573 2.625 2.678 25 2.450 2.500 2.550 24 2.352 2.400 2.448 23 2.267 2.313 2.359 22 2.144 2.188 2.232 21 2.058 2.100 2.142 20 1.960 2.000 2.040 19 1.862 1.900 1.938 18 1.764 1.800 1.836 17 1.632 1.665 1.698 16 1.544 1.575 1.607 table 2. reset threshold voltage suffix (t a = -40c to +125c) note: standard versions are shown in bold. there is a 2500- piece minimum order increment for standard versions. sample stock is typically held on standard versions only. nonstandard versions require a minimum order increment of 10,000 pieces. contact factory for availability. table 3. standard version table
max6746?ax6753 ? reset circuits with capacitor-adjustable reset/watchdog timeout delay ______________________________________________________________________________________ 13 selector guide part fixed v cc reset threshold adjustable reset threshold standard watchdog timer min/max watchdog timer push/ pull reset open-drain reset manual reset input max6746 x x x x max6747 x x x x max6748 x x x max6749 x x x max6750 x x x x max6751 x x x x max6752 x x x max6753 x x x top view wdi set1 gnd 1 2 8 7 v cc reset swt srt set0 3 4 6 5 max6752 max6753 sot23-8 pin configurations (continued) max6748 max6749 max6750 max6751 reset in gnd srt v cc v cc swt c srt c swt v in r1 r2 wdi wds i/o wds = 0 for normal mode wds = v cc for extended mode max6749 max4751 p reset reset typical operating circuit package type package code outline no. land pattern no. 8 sot23 k8-5 21-0078 90-0176 chip information process: bicmos package information for the latest package outline information and land patterns, go to www.maxim-ic.com/packages . note that a ?? ?? or ??in the package code indicates rohs status only. package drawings may show a different suffix character, but the drawing pertains to the package regardless of rohs status.
max6746?ax6753 ? reset circuits with capacitor-adjustable reset/watchdog timeout delay maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. 14 ____________________maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 2011 maxim integrated products maxim is a registered trademark of maxim integrated products, inc. revision history revision number revision date description pages changed 0 7/02 initial release 3 12/05 added the lead-free notation . 1 4 9/10 added the automotive version of the max6746 and the max6753 and revised the typical operating characteristics . 1, 4 5 12/10 added the automotive version of the max6750. 1 6 4/11 added the automotive version of the max6747. 1


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